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<h1 id="release-notes-for">Release Notes for</h1>
<h1 id="stm32wbaxx-hal-drivers"><mark>STM32WBAxx HAL Drivers</mark></h1>
<p>Copyright © 2022-2025 STMicroelectronics</p>
<a href="https://www.st.com" class="logo"><img src="_htmresc/st_logo_2020.png" alt="ST logo" /></a>
</center>
<h1 id="purpose">Purpose</h1>
<p>The STM32Cube HAL and LL, an STM32 abstraction layer embedded software, ensure maximized portability across STM32 portfolio.</p>
<p>The portable APIs layer provides a generic, multi instanced and simple set of APIs to interact with the upper layer (application, libraries and stacks). It is composed of native and extended APIs set. It is directly built around a generic architecture and allows the build-upon layers, like the middleware layer, to implement its functions without knowing in-depth the used STM32 device. This improves the library code reusability and guarantees an easy portability on other devices and STM32 families.</p>
<p>The Low Layer (LL) drivers are part of the STM32Cube firmware HAL that provides a basic set of optimized and one shot services. The Low layer drivers, contrary to the HAL ones are not fully portable across the STM32 families; the availability of some functions depends on the physical availability of the relative features on the product. The Low Layer (LL) drivers are designed to offer the following features:</p>
<ul>
<li>New set of inline functions for direct and atomic register access</li>
<li>One-shot operations that can be used by the HAL drivers or from application level</li>
<li>Full independence from HAL and standalone usage (without HAL drivers)</li>
<li>Full features coverage of all the supported peripherals</li>
</ul>
</div>
<div class="col-sm-12 col-lg-8">
<h1 id="update-history">Update History</h1>
<div class="collapse">
<input type="checkbox" id="collapse-section10" checked aria-hidden="true"> <label for="collapse-section10" aria-hidden="true"><strong>V1.6.0 / 07-February-2025</strong></label>
<div>
<h2 id="main-changes">Main Changes</h2>
<h3 id="official-release-of-stm32cubewba-firmware-package-supporting-stm32wba5x-and-stm32wba6x-devices">Official Release of <strong>STM32CubeWBA</strong> Firmware package supporting <strong>STM32WBA5x</strong> and <strong>STM32WBA6x</strong> devices</h3>
<h2 id="contents">Contents</h2>
<h3 id="official-release-of-halll-drivers-for-stm32wbaxx-serie">Official Release of <strong>HAL/LL Drivers</strong> for <strong>STM32WBAxx</strong> serie</h3>
<ul>
<li><strong>HAL/LL Drivers</strong> are available for all peripherals:
<ul>
<li><strong>HAL</strong>: ADC, COMP, CORTEX, CRC, CRYP, DMA, EXTI, FLASH, GPIO, GTZC, HASH, <strong>HCD</strong>, HSEM, I2C, ICACHE, IRDA, IWDG, LPTIM, <strong>PCD</strong>, PKA, PWR, RAMCFG, RCC, RNG, RTC, SAI, SMARTCARD, SMBUS, SPI, TIM, TSC, UART, USART, WWDG</li>
<li><strong>LL</strong>: ADC, BUS, COMP, CORTEX, CRC, DMA, EXTI, GPIO, HSEM, I2C, ICACHE, IWDG, LPTIM, LPUART, PKA, PWR, RCC, RNG, RTC, SPI, SYSTEM, TIM, USART, <strong>USB</strong>, UTILS, WWDG</li>
</ul></li>
<li>Update HAL/LL drivers to support of <strong>STM32WBA6xxx</strong> devices</li>
</ul>
<p><br />
</p>
<h2 id="hal-drivers-updates"><strong>HAL Drivers</strong> updates</h2>
<ul>
<li><strong>HAL ADC</strong> driver
<ul>
<li>Update the DMA data length management implementation according to source/destination width</li>
</ul></li>
<li><strong>HAL DMA</strong> driver
<ul>
<li>DMA Callbacks to be initialized to NULL in RESET state</li>
<li>Remove extra unused parentheses in HAL_DMA_IRQHandler</li>
<li>Fix Doxygen issues for User Manual generation</li>
<li>Fix GCC13 warning</li>
</ul></li>
<li><strong>HAL GPIO</strong> driver
<ul>
<li>Add pull-down capability in analog mode</li>
</ul></li>
<li><strong>HAL HSEM</strong> driver
<ul>
<li>Fix Doxygen issues for User Manual generation</li>
</ul></li>
<li><strong>HAL RCC</strong> driver
<ul>
<li>Fix Doxygen issues for User Manual generation</li>
</ul></li>
</ul>
<p><br />
</p>
<h2 id="ll-drivers-updates"><strong>LL Drivers</strong> updates</h2>
<ul>
<li><strong>LL LPTIM</strong> driver
<ul>
<li>Fixed LL_LPTIM_CC_SetChannelMode to manage properly on the fly channel mode changes.</li>
</ul></li>
</ul>
<p><br />
</p>
<h2 id="supported-devices-and-boards">Supported Devices and boards</h2>
<ul>
<li>STM32WBA50xx, STM32WBA52xx, STM32WBA54xx, STM32WBA55xx and STM32WBA5Mxx devices</li>
<li>STM32WBA62xx, STM32WBA63xx, STM32WBA64xx and STM32WBA65xx devices</li>
<li>NUCLEO-WBA55CG, STM32WBA55G-DK1 and B-WBA5M-WPAN boards</li>
<li>NUCLEO-WBA65RI and STM32WBA65I-DK1 board</li>
</ul>
<h2 id="backward-compatibility">Backward compatibility</h2>
<ul>
<li>Not applicable</li>
</ul>
<h2 id="known-limitations">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
<h2 id="dependencies">Dependencies</h2>
<ul>
<li>None</li>
</ul>
<h2 id="notes">Notes</h2>
<ul>
<li>None</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section9" aria-hidden="true"> <label for="collapse-section9" aria-hidden="true"><strong>V1.5.0 / 22-October-2024</strong></label>
<div>
<h2 id="main-changes-1">Main Changes</h2>
<h3 id="official-release-of-stm32cubewba-firmware-package-supporting-stm32wba50xx-stm32wba52xx-stm32wba54xx-stm32wba55xx-and-stm32wba5mxx-devices">Official Release of <strong>STM32CubeWBA</strong> Firmware package supporting <strong>STM32WBA50xx</strong>, <strong>STM32WBA52xx</strong>, <strong>STM32WBA54xx</strong>, <strong>STM32WBA55xx</strong> and <strong>STM32WBA5Mxx</strong> devices</h3>
<h2 id="contents-1">Contents</h2>
<h3 id="official-release-of-halll-drivers-for-stm32wbaxx-serie-1">Official Release of <strong>HAL/LL Drivers</strong> for <strong>STM32WBAxx</strong> serie</h3>
<ul>
<li><strong>HAL/LL Drivers</strong> are available for all peripherals:
<ul>
<li><strong>HAL</strong>: ADC, COMP, CORTEX, CRC, CRYP, DMA, EXTI, FLASH, GPIO, GTZC, HASH, HSEM, I2C, ICACHE, IRDA, IWDG, LPTIM, PKA, PWR, RAMCFG, RCC, RNG, RTC, SAI, SMARTCARD, SMBUS, SPI, TIM, TSC, UART, USART, WWDG</li>
<li><strong>LL</strong>: ADC, BUS, COMP, CORTEX, CRC, DMA, EXTI, GPIO, HSEM, I2C, ICACHE, IWDG, LPTIM, LPUART, PKA, PWR, RCC, RNG, RTC, SPI, SYSTEM, TIM, USART, UTILS, WWDG</li>
</ul></li>
<li>Update HAL/LL drivers to include latest corrections</li>
</ul>
<p><br />
</p>
<h2 id="hal-drivers-updates-1"><strong>HAL Drivers</strong> updates</h2>
<ul>
<li><strong>HAL COMP</strong> driver
<ul>
<li>Add power modes intermediate and ultra low power</li>
</ul></li>
<li><strong>HAL DMA</strong> driver
<ul>
<li>Add a reset of a node of a linked list</li>
<li>Remove unused code related to 2D addressing as no 2D addressing in this family</li>
</ul></li>
<li><strong>HAL GPIO</strong> driver
<ul>
<li>Add WBA5M device</li>
</ul></li>
<li><strong>HAL GTZC</strong> driver
<ul>
<li>Add WBA5M device</li>
</ul></li>
<li><strong>HAL I2C</strong> driver
<ul>
<li>Move variable tmp declaration at the beginning in I2C_TransferCofig function</li>
<li>Update function HAL_I2C_IsDeviceReady() to take into account the number of trials</li>
</ul></li>
<li><strong>HAL LPTIM</strong> driver
<ul>
<li>Removed duplicated macro</li>
<li>Fix compilation switch (COMP1/COMP2)</li>
</ul></li>
<li><strong>HAL PKA</strong> driver
<ul>
<li>SAES decryption fails after PKA deinitialization</li>
<li>Remove static global variables and add them to PKA handle to be compliant with HAL coding rules</li>
<li>Add check for MontgomeryParam not equal to null</li>
</ul></li>
<li><strong>HAL PWR</strong> driver
<ul>
<li>Reorganization of IS_PWR_WAKEUP_PIN macro in order to ease maintenance and declaration conditionned on CMSIS</li>
<li>Add WBA5M device</li>
<li>Guidance added for HAL_PWR_ConfigAttributes() API calls</li>
</ul></li>
<li><strong>HAL RAMCFG</strong> driver
<ul>
<li>Add WBA5M device</li>
</ul></li>
<li><strong>HAL RCC</strong> driver
<ul>
<li>Add WBA5M device</li>
<li>Guidance added for HAL_RCC_ConfigAttributes() API calls</li>
<li>Add missing <span class="citation" data-cites="arg">@arg</span> for RCC_IT_CSS function headers</li>
</ul></li>
<li><strong>HAL RNG</strong> driver
<ul>
<li>Fix issue NIST parameters ​​not taken</li>
</ul></li>
<li><strong>HAL RTC</strong> driver
<ul>
<li>Additional TAMP register bit ATCKSEL[3] inside TAMP_ATCR1</li>
</ul></li>
<li><strong>HAL UART</strong> driver
<ul>
<li>Correct DMA Rx abort procedure impact on ongoing Tx transfer in polling mode</li>
</ul></li>
</ul>
<p><br />
</p>
<h2 id="ll-drivers-updates-1"><strong>LL Drivers</strong> updates</h2>
<ul>
<li><strong>LL ADC</strong> driver
<ul>
<li>Update description of LL_ADC_REG_ReadConversionData32()</li>
</ul></li>
<li><strong>LL COMP</strong> driver
<ul>
<li>Add power modes intermediate and ultra low power</li>
</ul></li>
<li><strong>LL DMA</strong> driver
<ul>
<li>Misra-C:2012 Rule-8.13 update</li>
</ul></li>
<li><strong>LL I2C</strong> driver
<ul>
<li>Update defined trigger for I2C autonomous mode.</li>
</ul></li>
<li><strong>LL LPTIM</strong> driver
<ul>
<li>Fix compilation switch (COMP1/COMP2)</li>
</ul></li>
<li><strong>LL RTC</strong> driver
<ul>
<li>Additional TAMP register bit ATCKSEL[3] inside TAMP_ATCR1</li>
</ul></li>
<li><strong>LL UTILS</strong> driver
<ul>
<li>Add WBA5M device</li>
</ul></li>
</ul>
<p><br />
</p>
<h2 id="supported-devices-and-boards-1">Supported Devices and boards</h2>
<ul>
<li>STM32WBA50xx, STM32WBA52xx, STM32WBA54xx, STM32WBA55xx and STM32WBA5Mxx devices</li>
<li>NUCLEO-WBA55CG, STM32WBA55G-DK1 and b-WBA5M-WPAN boards</li>
</ul>
<h2 id="backward-compatibility-1">Backward compatibility</h2>
<ul>
<li>Not applicable</li>
</ul>
<h2 id="known-limitations-1">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
<h2 id="dependencies-1">Dependencies</h2>
<ul>
<li>None</li>
</ul>
<h2 id="notes-1">Notes</h2>
<ul>
<li>None</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section8" aria-hidden="true"> <label for="collapse-section8" aria-hidden="true"><strong>V1.4.0 / 05-June-2024</strong></label>
<div>
<h2 id="main-changes-2">Main Changes</h2>
<h3 id="official-release-of-stm32cubewba-firmware-package-supporting-stm32wba50xx-stm32wba52xx-stm32wba54xx-and-stm32wba55xx-devices">Official Release of <strong>STM32CubeWBA</strong> Firmware package supporting <strong>STM32WBA50xx</strong>, <strong>STM32WBA52xx</strong>, <strong>STM32WBA54xx</strong> and <strong>STM32WBA55xx</strong> devices</h3>
<h2 id="contents-2">Contents</h2>
<h3 id="official-release-of-halll-drivers-for-stm32wbaxx-serie-2">Official Release of <strong>HAL/LL Drivers</strong> for <strong>STM32WBAxx</strong> serie</h3>
<ul>
<li><strong>HAL/LL Drivers</strong> are available for all peripherals:
<ul>
<li><strong>HAL</strong>: ADC, COMP, CORTEX, CRC, CRYP, DMA, EXTI, FLASH, GPIO, GTZC, HASH, HSEM, I2C, ICACHE, IRDA, IWDG, LPTIM, PKA, PWR, RAMCFG, RCC, RNG, RTC, SAI, SMARTCARD, SMBUS, SPI, TIM, TSC, UART, USART, WWDG</li>
<li><strong>LL</strong>: ADC, COMP, CRC, DMA, EXTI, GPIO, I2C, ICACHE, LPTIM, LPUART, PKA, PWR, RCC, RNG, RTC, SPI, TIM, USART, UTILS</li>
</ul></li>
<li>Update HAL/LL drivers to include latest corrections</li>
</ul>
<p><br />
</p>
<h2 id="hal-drivers-updates-2"><strong>HAL Drivers</strong> updates</h2>
<ul>
<li><strong>HAL CORTEX</strong> driver
<ul>
<li>Add how to use MPU attributes</li>
</ul></li>
<li><strong>HAL CRC</strong> driver
<ul>
<li>Update HAL_CRC_DeInit() function to fix coverity warning</li>
</ul></li>
<li><strong>HAL GPIO</strong> driver
<ul>
<li>Update RF alternate function define to keep only one</li>
</ul></li>
<li><strong>HAL GTZC</strong> driver
<ul>
<li>Fixed overflow issue in HAL_GTZC_TZIC_GetFlag()</li>
</ul></li>
<li><strong>HAL RNG</strong> driver
<ul>
<li>Remove wrong implementation of the HAL_RNG_GenerateRandomNumber</li>
<li>Update the Check of valid random data</li>
<li>Update the flag in new check to avoid false timeout detection</li>
<li>Add CR, HTCR NIST values</li>
</ul></li>
<li><strong>HAL UART</strong> driver
<ul>
<li>Add HAL_UART_RXEVENT_IDLE event notification to user in case of HAL_UARTEx_ReceiveToIdle_DMA() use with Circular DMA, even if occurring just after TC event.</li>
<li>Correct wrong comment in HAL_UARTEx_DisableFifoMode() function</li>
<li>Align prescaler value used by default in UART_GET_DIV_FACTOR macro with RM.</li>
</ul></li>
<li><strong>HAL USART</strong> driver
<ul>
<li>Improve the visibility of the SPI function support in HAL USART description and comments.</li>
<li>Correct wrong comment in HAL_USARTEx_DisableFifoMode() function</li>
<li>Align prescaler value used by default in USART_GET_DIV_FACTOR macro with RM.</li>
</ul></li>
</ul>
<p><br />
</p>
<h2 id="ll-drivers-updates-2"><strong>LL Drivers</strong> updates</h2>
<ul>
<li><strong>LL CORTEX</strong> driver
<ul>
<li>Remove duplicate write of attributes in LL_MPU_ConfigRegion() function</li>
<li>Add how to use MPU attributes</li>
</ul></li>
<li><strong>LL EXTI</strong> driver
<ul>
<li>Update LL_EXTI_DeInit, do not reset security and privilege</li>
</ul></li>
<li><strong>LL HSEM</strong> driver
<ul>
<li>Update LL HSEM description and define to be aligned with the correct number of semaphores</li>
</ul></li>
<li><strong>LL RNG</strong> driver
<ul>
<li>Remove wrong implementation of LL_RNG APIs</li>
<li>Correction of Misra-C:2012 Rule-8.13 warning</li>
<li>Add CR, HTCR NIST values</li>
</ul></li>
<li><strong>LL UTILS</strong> driver
<ul>
<li>Update package type values</li>
</ul></li>
</ul>
<p><br />
</p>
<h2 id="supported-devices-and-boards-2">Supported Devices and boards</h2>
<ul>
<li>STM32WBA50xx, STM32WBA52xx, STM32WBA54xx and STM32WBA55xx devices</li>
<li>NUCLEO-WBA52CG, NUCLEO-WBA55CG and STM32WBA55G-DK1 boards</li>
</ul>
<h2 id="backward-compatibility-2">Backward compatibility</h2>
<ul>
<li>Not applicable</li>
</ul>
<h2 id="known-limitations-2">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
<h2 id="dependencies-2">Dependencies</h2>
<ul>
<li>None</li>
</ul>
<h2 id="notes-2">Notes</h2>
<ul>
<li>None</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true"><strong>V1.3.0 / 07-February-2024</strong></label>
<div>
<h2 id="main-changes-3">Main Changes</h2>
<h3 id="official-release-of-stm32cubewba-firmware-package-supporting-stm32wba52xx-and-stm32wba55xx-devices">Official Release of <strong>STM32CubeWBA</strong> Firmware package supporting <strong>STM32WBA52xx</strong> and <strong>STM32WBA55xx</strong> devices</h3>
<h2 id="contents-3">Contents</h2>
<h3 id="official-release-of-halll-drivers-for-stm32wbaxx-serie-3">Official Release of <strong>HAL/LL Drivers</strong> for <strong>STM32WBAxx</strong> serie</h3>
<ul>
<li><strong>HAL/LL Drivers</strong> are available for all peripherals:
<ul>
<li><strong>HAL</strong>: ADC, COMP, CORTEX, CRC, CRYP, DMA, EXTI, FLASH, GPIO, GTZC, HASH, HSEM, I2C, ICACHE, IRDA, IWDG, LPTIM, PKA, PWR, RAMCFG, RCC, RNG, RTC, SAI, SMARTCARD, SMBUS, SPI, TIM, TSC, UART, USART, WWDG</li>
<li><strong>LL</strong>: ADC, COMP, CRC, DMA, EXTI, GPIO, I2C, ICACHE, LPTIM, LPUART, PKA, PWR, RCC, RNG, RTC, SPI, TIM, USART, UTILS</li>
</ul></li>
<li>Update HAL/LL drivers to include latest corrections</li>
</ul>
<p><br />
</p>
<h2 id="hal-drivers-updates-3"><strong>HAL Drivers</strong> updates</h2>
<ul>
<li><strong>HAL CORTEX</strong> driver
<ul>
<li>Add functions to configure MPU region without enabling it</li>
</ul></li>
<li><strong>HAL I2C</strong> driver
<ul>
<li>Update HAL_I2C_Slave_Transmit to check if the received NACK is the correct one</li>
<li>Update SMBUS_ITErrorHandler to flash TXDR just in case of error</li>
</ul></li>
<li><strong>HAL RCC</strong> driver
<ul>
<li>Add note for Backup domain access to be enabled for RCC_PERIPHCLK_RADIOST use in HAL_RCCEx_PeriphCLKConfig()</li>
</ul></li>
<li><strong>HAL RTC</strong> driver
<ul>
<li>Update access to the SCR register now done via a one-shot write access</li>
</ul></li>
<li><strong>HAL TIM</strong> driver
<ul>
<li>Remove not supported TIM_CLOCKSOURCE_ITR3, TIM_CLOCKSOURCE_ITR9 and TIM_CLOCKSOURCE_ITR10 constants</li>
<li>Update HAL_TIM_ConfigOCrefClear() function to check if SMCR.OCCS bit-field is supported by the current instance before updating registers</li>
</ul></li>
<li><strong>HAL TSC</strong> driver
<ul>
<li>Modify assert to track the fordidden prescaler related to DT duration</li>
</ul></li>
</ul>
<p><br />
</p>
<h2 id="ll-drivers-updates-3"><strong>LL Drivers</strong> updates</h2>
<ul>
<li><strong>LL LPUART</strong> driver
<ul>
<li>Add LL LPUART API allowing TX FIFO flush request</li>
</ul></li>
</ul>
<p><br />
</p>
<h2 id="supported-devices-and-boards-3">Supported Devices and boards</h2>
<ul>
<li>STM32WBA52xx and STM32WBA55xx devices</li>
<li>NUCLEO-WBA52CG, NUCLEO-WBA55CG and STM32WBA55G-DK1 boards</li>
</ul>
<h2 id="backward-compatibility-3">Backward compatibility</h2>
<ul>
<li>Not applicable</li>
</ul>
<h2 id="known-limitations-3">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
<h2 id="dependencies-3">Dependencies</h2>
<ul>
<li>None</li>
</ul>
<h2 id="notes-3">Notes</h2>
<ul>
<li>None</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true"><strong>V1.2.0 / 02-November-2023</strong></label>
<div>
<h2 id="main-changes-4">Main Changes</h2>
<h3 id="official-release-of-stm32cubewba-firmware-package-supporting-stm32wba52xx-and-stm32wba55xx-devices-1">Official Release of <strong>STM32CubeWBA</strong> Firmware package supporting <strong>STM32WBA52xx</strong> and <strong>STM32WBA55xx</strong> devices</h3>
<h2 id="contents-4">Contents</h2>
<h3 id="official-release-of-halll-drivers-for-stm32wbaxx-serie-4">Official Release of <strong>HAL/LL Drivers</strong> for <strong>STM32WBAxx</strong> serie</h3>
<ul>
<li><strong>HAL/LL Drivers</strong> are available for all peripherals:
<ul>
<li><strong>HAL</strong>: ADC, COMP, CORTEX, CRC, CRYP, DMA, EXTI, FLASH, GPIO, GTZC, HASH, HSEM, I2C, ICACHE, IRDA, IWDG, LPTIM, PKA, PWR, RAMCFG, RCC, RNG, RTC, SAI, SMARTCARD, SMBUS, SPI, TIM, TSC, UART, USART, WWDG</li>
<li><strong>LL</strong>: ADC, COMP, CRC, DMA, EXTI, GPIO, I2C, ICACHE, LPTIM, LPUART, PKA, PWR, RCC, RNG, RTC, SPI, TIM, USART, UTILS</li>
</ul></li>
<li>Update <strong>SysTick</strong> clock source management to handle HCLK, HCLK/8, LSI and LSE sources
<ul>
<li>The SysTick clock source shall be configured with HAL_SYSTICK_CLKSourceConfig()</li>
<li>New implementation allowing to not re-initialize the SysTick in RCC after HCLK change if the SysTick source is LSI or LSE</li>
<li>Add support of HAL_SYSTICK_GetCLKSourceConfig() API to return the selected SYSTICK clock source set with HAL_SYSTICK_CLKSourceConfig()</li>
</ul></li>
</ul>
<p><br />
</p>
<h2 id="hal-drivers-updates-4"><strong>HAL Drivers</strong> updates</h2>
<ul>
<li><strong>HAL CORTEX</strong> driver
<ul>
<li>Check preemption priority and subpriority versus current priority grouping</li>
<li>Remove check of __MPU_PRESENT flag in HAL CORTEX</li>
<li>Add support of HAL_SYSTICK_GetCLKSourceConfig() API to return the selected SYSTICK clock source set with HAL_SYSTICK_CLKSourceConfig()</li>
</ul></li>
<li><strong>HAL DMA</strong> driver
<ul>
<li>Update HAL_DMA_GetConfigChannelAttributes() to return DMA attributes even when TZEN=0</li>
<li>Update HAL_DMA_IRQHandler() to remove unnecessary hardware flag check upon suspend interrupt management</li>
</ul></li>
<li><strong>HAL FLASH</strong> driver
<ul>
<li>Update HAL FLASH API to support ECC management</li>
</ul></li>
<li><strong>HAL GPIO</strong> driver
<ul>
<li>Update HAL_GPIO_Init() using CMSIS definitions</li>
<li>Update GetConfigPinAttributes() to ensure it is used on a single pin</li>
</ul></li>
<li><strong>HAL I2C</strong> driver
<ul>
<li>Update HAL_I2C_Mem_Write_IT() to initialize XferSize at 0</li>
<li>Update HAL I2C driver to disable all interrupts after end of transaction</li>
<li>Update I2C_Slave_ISR_IT(), I2C_Slave_ISR_DMA() and I2C_ITSlaveCplt() to prevent the call of HAL_I2C_ListenCpltCallback() twice</li>
<li>Update I2C_WaitOnRXNEFlagUntilTimeout() to check I2C_FLAG_AF independently from I2C_FLAG_RXNE</li>
<li>Update HAL_I2C_IsDeviceReady() function to remove unusable code</li>
</ul></li>
<li><strong>HAL ICACHE</strong> driver
<ul>
<li>Update description of HAL_ICACHE_Enable() function</li>
<li>Update HAL_ICACHE_DeInit() to set registers to their reset value</li>
<li>Update HAL_ICACHE_Invalidate() to prevent launching an invalidation if one has already been launched</li>
</ul></li>
<li><strong>HAL PKA</strong> driver
<ul>
<li>Update HAL_PKA_IRQHandler() to fix MISRA C:2012-Rule-10.3, and Rule-10.4_a warnings</li>
</ul></li>
<li><strong>HAL RCC</strong> driver
<ul>
<li>Rename RCC_SYSTICKCLKSOURCE_HSI to RCC_SYSTICKCLKSOURCE_HSI_DIV4</li>
<li>Update HAL_RCC_NMI_IRQHandler() to clear flag before callback</li>
</ul></li>
<li><strong>HAL SAI</strong> driver
<ul>
<li>Improve audio quality (avoid potential glitch)</li>
</ul></li>
<li><strong>HAL SMARTCARD</strong> driver
<ul>
<li>Fix CONSTANT_EXPRESSION_RESULT coverity warning</li>
</ul></li>
<li><strong>HAL SMBUS</strong> driver
<ul>
<li>Remove default value to solve MISRA warning</li>
</ul></li>
<li><strong>HAL SPI</strong> driver
<ul>
<li>In Full Duplex mode, calling HAL_SPI_TransmitReceive_DMA() can generate a RX HDMA busy if HDMA TX is not well initialized. To avoid this, now a DMA abort is done on RX path to reset HDMA RX to ready state.</li>
<li>Add a check before send a Tx to not exceed RxFifo capacity</li>
<li>Update IT API to enable interrupts after process unlock</li>
<li>Remove HAL Lock/UnLock mechanism inside HAL_SPI_RegisterCallback and HAL_xxx_UnRegisterCallback functions</li>
</ul></li>
<li><strong>HAL SYSCFG</strong> driver
<ul>
<li>Update assert macro in HAL_SYSCFG_GetConfigAttributes() for accurate argument filtering</li>
<li>Allow HAL_SYSCFG_GetConfigAttributes() to be available in both secure and non-secure mode</li>
</ul></li>
<li><strong>HAL TIM</strong> driver
<ul>
<li>Fix MISRA warning in TIM_CCxNChannelCmd</li>
<li>Generalize bidirectional break input(s) configuration</li>
<li>Update HAL_TIM_IRQHandler() to clear System break interrupt flag</li>
<li>Update TIM_Base_SetConfig() to clear IUF flag after a software update triggered by HAL</li>
<li>Update HAL_TIMEx_OCN_Stop_IT() and HAL_TIMEx_PWMN_Stop_IT() using TIM_CCER_CCxNE_MASK definitions</li>
<li>Improve HAL_TIMEx_ConfigBreakDeadTime() function implementation</li>
<li>Update TIM_DMAErrorCCxN() to handle CH4N support</li>
</ul></li>
<li><strong>HAL UART</strong> driver
<ul>
<li>Fix incorrect gState check in HAL_UART_RegisterRxEventCallback()/HAL_UART_UnRegisterRxEventCallback() to allow user Rx Event Callback registration when a transmit is ongoing</li>
<li>Avoid RTOF flag to be cleared by a transmit process in polling mode</li>
</ul></li>
</ul>
<p><br />
</p>
<h2 id="ll-drivers-updates-4"><strong>LL Drivers</strong> updates</h2>
<ul>
<li><strong>LL GPIO</strong> driver
<ul>
<li>Update LL_GPIO_SetPinMode() using CMSIS definitions</li>
</ul></li>
<li><strong>LL I2C</strong> driver
<ul>
<li>Update LL_I2C_HandleTranfer() function to prevent undefined behavior of volatile usage before updating the CR2 register</li>
</ul></li>
<li><strong>LL RTC</strong> driver
<ul>
<li>Update comments about RTC shadow registers</li>
</ul></li>
<li><strong>LL TIM</strong> driver
<ul>
<li>Remove support for LL_TIM_ReArmBRK() and LL_TIM_ReArmBRK2()</li>
<li>Add new function LL_TIM_CC_IsEnabledPreload()</li>
<li>Update LL_TIM_BDTR_Init() implementation</li>
<li>Update OCxConfig() functions to configure complementary channels only when supported</li>
<li>Remove LL_TIM_TIM3_ETRSOURCE_TIM4_ETR definition</li>
</ul></li>
</ul>
<p><br />
</p>
<h2 id="supported-devices-and-boards-4">Supported Devices and boards</h2>
<ul>
<li>STM32WBA52xx and STM32WBA55xx devices</li>
<li>NUCLEO-WBA52CG, NUCLEO-WBA55CG and STM32WBA55G-DK1 boards</li>
</ul>
<h2 id="backward-compatibility-4">Backward compatibility</h2>
<ul>
<li>Not applicable</li>
</ul>
<h2 id="known-limitations-4">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
<h2 id="dependencies-4">Dependencies</h2>
<ul>
<li>None</li>
</ul>
<h2 id="notes-4">Notes</h2>
<ul>
<li>None</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true"><strong>V1.1.0 / 06-June-2023</strong></label>
<div>
<h2 id="main-changes-5">Main Changes</h2>
<h3 id="official-release-of-stm32cubewba-firmware-package-supporting-stm32wba52xx-devices">Official Release of <strong>STM32CubeWBA</strong> Firmware package supporting <strong>STM32WBA52xx</strong> devices</h3>
<h2 id="contents-5">Contents</h2>
<h3 id="official-release-of-halll-drivers-for-stm32wbaxx-serie-5">Official Release of <strong>HAL/LL Drivers</strong> for <strong>STM32WBAxx</strong> serie</h3>
<ul>
<li><strong>HAL/LL Drivers</strong> are available for all peripherals:
<ul>
<li><strong>HAL</strong>: ADC, CORTEX, CRC, CRYP, DMA, EXTI, FLASH, GPIO, GTZC, HASH, HSEM, I2C, ICACHE, IRDA, IWDG, LPTIM, PKA, PWR, RAMCFG, RCC, RNG, RTC, SMARTCARD, SMBUS, SPI, TIM, TSC, UART, USART, WWDG</li>
<li><strong>LL</strong>: ADC, CRC, DMA, EXTI, GPIO, I2C, ICACHE, LPTIM, LPUART, PKA, PWR, RCC, RNG, RTC, SPI, TIM, USART, UTILS</li>
</ul></li>
</ul>
<p><br />
</p>
<h2 id="hal-drivers-updates-5"><strong>HAL Drivers</strong> updates</h2>
<ul>
<li><strong>HAL CORTEX</strong> driver
<ul>
<li>Use synchronization barriers instead of memory barriers for MPU configuration (as recommended by ARM)</li>
<li>Update MPU_ACCESS_OUTER_SHAREABLE and LL_MPU_ACCESS_OUTER_SHAREABLE definitions</li>
</ul></li>
<li><strong>HAL CRYP</strong> driver
<ul>
<li>Update Crypt/Decrypt IT processes to avoid Computation Completed IRQ fires before DINR pointer increment</li>
</ul></li>
<li><strong>HAL DMA</strong> driver
<ul>
<li>Downsize LinkRegisters internal table from 8 to 6 for memory size optimization</li>
<li>Remove 2D addressing as not supported</li>
<li>Remove RepeatBlockConfig from DMA_NodeConfTypeDef structure and internal get function as not used</li>
<li>Update Assert checking the selected request. Assert can now also check in peripheral to memory case</li>
<li>Add missing TIM3 trigger and Request/trigger when I2C1, SAI1, AES, LPTIM2 feature available</li>
</ul></li>
<li><strong>HAL EXTI</strong> driver
<ul>
<li>Fix computation of pExtiConfig-&gt;GPIOSel in HAL_EXTI_GetConfigLine()</li>
</ul></li>
<li><strong>HAL Generic</strong> driver
<ul>
<li>Allow redefinition of macro UNUSED(x)</li>
<li>Move HAL version definition to HAL generic header file (stm32XXxx_hal.h)</li>
</ul></li>
<li><strong>HAL I2C</strong> driver
<ul>
<li>Update HAL_I2C_IsDeviceReady() to support 10-bit addressing mode</li>
<li>Update HAL I2C driver to disable all interrupts after end of transaction</li>
<li>Update HAL_I2C_Init() API to clear ADD10 bit in 7-bit addressing mode</li>
</ul></li>
<li><strong>HAL PWR</strong> driver
<ul>
<li>Remove __force_stores intrinsic keyword usage</li>
</ul></li>
<li><strong>HAL RTC</strong> driver
<ul>
<li>Remove useless polling of RTC_ICSR_WUTWF flag</li>
<li>Remove all useless RTC Write Protection Disable/Enable usage</li>
<li>Rework of HAL_RTC_GET_FLAG() macro implementation to return flag bit status</li>
<li>Rework of macro implementation to avoid confusion with parameters input</li>
</ul></li>
<li><strong>HAL TIM</strong> driver
<ul>
<li>Assert check for the right channels</li>
<li>Remove multiple volatile reads or writes in interrupt handler, for better performance</li>
</ul></li>
<li><strong>HAL TSC</strong> driver
<ul>
<li>Add parameter assertion depends on Duration time restriction link to product</li>
</ul></li>
<li><strong>HAL UART</strong> driver
<ul>
<li>Update initialisation sequence for TXINV, RXINV and TXRXSWAP settings</li>
</ul></li>
</ul>
<p><br />
</p>
<h2 id="ll-drivers-updates-5"><strong>LL Drivers</strong> updates</h2>
<ul>
<li><strong>LL DMA</strong> driver
<ul>
<li>Clarifies that Linked List Address Offset can be chosen by steps of 4 bytes within 0 to 0xFFFC range</li>
<li>Fix inversion in LL_DMA_ConfigChannelTransfer description parameter</li>
</ul></li>
<li><strong>LL ICACHE</strong> driver
<ul>
<li>Update LL_ICACHE_GetRegionBaseAddress() to return the complete address</li>
</ul></li>
<li><strong>LL RCC</strong> driver
<ul>
<li>Add LL_RCC_HSE_IsEnabledPrescaler() to check HSE prescaler status</li>
</ul></li>
<li><strong>LL TIM</strong> driver
<ul>
<li>Remove unnecessary change of MOE bitfield in LL_TIM_BDTR_Init()</li>
</ul></li>
</ul>
<p><br />
</p>
<h2 id="supported-devices-and-boards-5">Supported Devices and boards</h2>
<ul>
<li>STM32WBA52xx devices</li>
<li>NUCLEO-WBA52CG board</li>
</ul>
<h2 id="backward-compatibility-5">Backward compatibility</h2>
<ul>
<li>Not applicable</li>
</ul>
<h2 id="known-limitations-5">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
<h2 id="dependencies-5">Dependencies</h2>
<ul>
<li>None</li>
</ul>
<h2 id="notes-5">Notes</h2>
<ul>
<li>None</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" checked aria-hidden="true"><strong>V1.0.0 / 08-February-2023</strong></label>
<div>
<h2 id="main-changes-6">Main Changes</h2>
<h3 id="first-official-release-of-stm32cubewba-firmware-package-supporting-stm32wba52xx-devices">First Official Release of <strong>STM32CubeWBA</strong> Firmware package supporting <strong>STM32WBA52xx</strong> devices</h3>
<h2 id="contents-6">Contents</h2>
<h3 id="first-official-release-of-halll-drivers-for-stm32wbaxx-serie">First Official Release of <strong>HAL/LL Drivers</strong> for <strong>STM32WBAxx</strong> serie</h3>
<ul>
<li><strong>HAL/LL Drivers</strong> are available for all peripherals:
<ul>
<li><strong>HAL</strong>: ADC, CORTEX, CRC, CRYP, DMA, EXTI, FLASH, GPIO, GTZC, HASH, HSEM, I2C, ICACHE, IRDA, IWDG, LPTIM, PKA, PWR, RAMCFG, RCC, RNG, RTC, SMARTCARD, SMBUS, SPI, TIM, TSC, UART, USART, WWDG</li>
<li><strong>LL</strong>: ADC, CRC, DMA, EXTI, GPIO, I2C, ICACHE, LPTIM, LPUART, PKA, PWR, RCC, RNG, RTC, SPI, TIM, USART, UTILS</li>
</ul></li>
</ul>
<p><br />
</p>
<h2 id="supported-devices-and-boards-6">Supported Devices and boards</h2>
<ul>
<li>STM32WBA52xx devices</li>
<li>NUCLEO-WBA52CG board</li>
</ul>
<h2 id="backward-compatibility-6">Backward compatibility</h2>
<ul>
<li>Not applicable</li>
</ul>
<h2 id="known-limitations-6">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
<h2 id="dependencies-6">Dependencies</h2>
<ul>
<li>None</li>
</ul>
<h2 id="notes-6">Notes</h2>
<ul>
<li>None</li>
</ul>
</div>
</div>
</div>
</div>
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<p>For complete documentation on STM32WBAxx, visit: <a href="http://www.st.com/stm32wba">www.st.com/stm32wba</a></p>
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